The ButterStick is an FPGA development board. Building off the OrangeCrab, the Butterstick's primary focus is exposing lots of fast I/O pins. To achieve this goal it makes use of the SYZYGY peripheral connector standard. The board features High-speed USB and Gigabit Ethernet for high-speed input/output to a computer. Additionally there is 256MB (2Gbits) of onboard DDR3L memory.

The development board makes use of the ECP5 FPGA from Lattice which is fully compatible with the open-source FPGA synthesis flow.

Features at a glance

• Compact Size
• High speed USB (480Mbit/s)
• Gigabit Ethernet
• DDR3L Memory (2Gbits)
• SYZYGY compatible
• 82 I/O pins
• 5Gbps SERDES (upto 4x tx/rx lanes)

Hardware Overview

• Lattice ECP5  85F FPGA in BGA381 package
• 2Gbit DDR3L Memory
• USB-C USB2.0 connection
• High-speed (480Mbit) ULPI PHY
• Non-volatile Storage
• 128Mbit QSPI FLASH Memory
• MicroSD socket
• 4bit SD interface (CK, CMD, DAT0-3)
• Power supply
• USB-C 5V input.
• Aux 5V power input.
• Onboard oscillators
• 60Mhz
• 25MHz (RGMII PHY)
• Convenient 0.1" JTAG connector
• User I/O
• 2x Button
• 7x RGB LED
• SYZYGY A,B (Standard)
• Adjustable VCCIO 1.2V-3.3V
• up to 32 single ended I/O
• 10 differential pairs
• Dedicated clock input pins
• SYZYGY C (Transceiver)
• Adjustable VCCIO 1.2V-3.3V
• up to 14 single ended I/O
• 4x Lanes RX (5Gbps)
• 4x Lanes TX (5Gbps)
• 1x Reference clock input
• Board dimensions
• Dimensions: 80mm x 49mm

ButterStick-r1.0-2G-85F | 

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LFE5UM5G-85F-8BG381C    |

2x MT41K64M16TW-107:J TR|

License

• Hardware licensed under CERN OHL v1.2
• ButterStick files: https://github.com/gregdavill/ButterStick
• SYZYGY Specifications: https://syzygyfpga.io/

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